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MITSUBISHI
PM50RLA120
FLAT-BASE TYPE INSULATED PACKAGE
PM50RLA120
FEATURE
a) Adopting new 5th generation IGBT (CSTBT) chip, which performance is improved by 1m fine rule process. For example, typical Vce(sat)=1.9V @Tj=125C b) I adopt the over-temperature conservation by Tj detection of CSTBT chip, and error output is possible from all each conservation upper and lower arm of IPM. c) New small package Reduce the package size by 10%, thickness by 22% from S-DASH series. d) Current rating of brake part increased. 50% for the current rating of inverter part. * 3 50A, 1200V Current-sense IGBT type inverter * 25A, 1200V Current-sense regenerative brake IGBT * Monolithic gate drive & protection logic * Detection, protection & status indication circuits for, shortcircuit, over-temperature & under-voltage (P-Fo available from upper arm devices) * Acoustic noise-less 5.5kW/7.5kW class inverter application
APPLICATION General purpose inverter, servo drives and other motor controls
PACKAGE OUTLINES
Dimensions in mm
120 7 19.75 3.25 16 3-2 16 3-2 106 16 3-2 15.25 6-2 2-5.5 MOUNTING HOLES
Terminal code 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. VUPC UFO UP VUP1 VVPC VFO VP VVP1 VWPC WFO 11. 12. 13. 14. 15. 16. 17. 18. 19. WP VWP1 VNC VN1 Br UN VN WN Fo
55
B U V W
N
35
6-6 10.75 32.75 23 23 23
19-
0.5
32 6 6 13 31
P
Oct. 2003
MITSUBISHI
PM50RLA120
FLAT-BASE TYPE INSULATED PACKAGE
INTERNAL FUNCTIONS BLOCK DIAGRAM
Br Fo
VNC WN
VN1
VN
UN
WP VWP1 VWPC WFO
VP VVPC
VVP1 VFO
UP VUPC
VUP1 UFO
Gnd In
Fo Vcc
Gnd In
Fo Vcc
Gnd In
Fo Vcc
Gnd In
Fo Vcc
Gnd In
Fo Vcc
Gnd In
Fo Vcc
Gnd In
Fo Vcc
Gnd
Si Out
OT
Gnd
Si Out
OT
Gnd
Si Out
OT
Gnd
Si Out
OT
Gnd
Si Out
OT
Gnd
Si Out
OT
Gnd
Si Out
OT
B
N
W
V
U
P
MAXIMUM RATINGS (Tj = 25C, unless otherwise noted) INVERTER PART
Symbol VCES IC ICP PC Tj Parameter Collector-Emitter Voltage Collector Current Collector Current (Peak) Collector Dissipation Junction Temperature Condition VD = 15V, VCIN = 15V TC = 25C TC = 25C TC = 25C Ratings 1200 50 100 369 -20 ~ +150 Unit V A A W C
(Note-2)
BRAKE PART
Symbol VCES IC ICP PC VR(DC) IF Tj Parameter Collector-Emitter Voltage Collector Current Collector Current (Peak) Collector Dissipation FWDi Rated DC Reverse Voltage FWDi Forward Current Junction Temperature Condition VD = 15V, VCIN = 15V TC = 25C TC = 25C TC = 25C TC = 25C TC = 25C Ratings 1200 25 50 267 1200 25 -20 ~ +150 Unit V A A W V A C
(Note-2)
CONTROL PART
Symbol VD VCIN VFO IFO Parameter Supply Voltage Input Voltage Fault Output Supply Voltage Fault Output Current Condition Applied between : VUP1-VUPC VVP1-VVPC, VWP1-VWPC, VN1-VNC Applied between : UP-VUPC, VP-VVPC WP-VWPC, UN * VN * WN * Br-VNC Applied between : UFO-VUPC, VFO-VVPC, WFO-VWPC FO-VNC Sink current at UFO, VFO, WFO, FO terminals Ratings 20 20 20 20 Unit V V V mA
Oct. 2003
MITSUBISHI
PM50RLA120
FLAT-BASE TYPE INSULATED PACKAGE
TOTAL SYSTEM
Parameter Supply Voltage Protected by VCC(PROT) SC VCC(surge) Supply Voltage (Surge) Module Case Operating TC Temperature Storage Temperature Tstg Viso Isolation Voltage Symbol Condition VD = 13.5 ~ 16.5V, Inverter Part, Tj = +125C Start Applied between : P-N, Surge value (Note-2) Ratings 800 1000 -20 ~ +100 -40 ~ +125 2500 Unit V V C C Vrms
60Hz, Sinusoidal, Charged part to Base, AC 1 min.
THERMAL RESISTANCES
Symbol Rth(j-c)Q Rth(j-c)F Rth(j-c)Q Rth(j-c)F Rth(j-c)Q Rth(j-c)F Rth(j-c)Q Rth(j-c)F Rth(c-f) Parameter Condition Inverter IGBT (per 1 element) Inverter FWDi (per 1 element) Brake IGBT Brake FWDi Inverter IGBT (per 1 element) Inverter FWDi (per 1 element) Brake IGBT Brake FWDi Case to fin, (per 1 module) Thermal grease applied (Note-1) (Note-1) (Note-1) (Note-1) (Note-2) (Note-2) (Note-2) (Note-2) Min. -- -- -- -- -- -- -- -- -- Limits Typ. -- -- -- -- -- -- -- -- -- Max. 0.26 0.39 0.36 0.60 0.34 0.51 0.47 0.78 0.038 Unit
Junction to case Thermal Resistances
C/W
Contact Thermal Resistance
(Note-1) TC measurement point is just under the chips (Bottom view). If you use this value, Rth(f-a) should be measured just under the chips. (Note-2) TC measurement point is as shown below (Top view). Table1 : TC measurement point of just under the chips. arm axis X Y UP IGBT FWDi 28.3 28.4 -7.7 1.5 VP IGBT FWDi 65.0 64.9 -7.7 1.5 WP IGBT FWDi 87.0 86.9 -7.7 1.5 UN IGBT FWDi 39.3 39.2 5.7 -3.5 VN IGBT FWDi 54.0 54.1 5.7 -3.5 WN IGBT FWDi 76.0 76.1 5.7 -3.5 (Unit : mm) IGBT 17.9 -10.5 Br FWDi 19.3 4.3
Bottom view
Top view
TC (Base plate)
ELECTRICAL CHARACTERISTICS (Tj = 25C, unless otherwise noted) INVERTER PART
Symbol VCE(sat) VEC ton trr tc(on) toff tc(off) ICES Parameter Collector-Emitter Saturation Voltage FWDi Forward Voltage Condition VD = 15V, IC = 50A (Fig. 1) VCIN = 0V, Pulsed -IC = 50A, VD = 15V, VCIN = 15V VD = 15V, VCIN = 0V15V VCC = 600V, IC = 50A Tj = 125C Inductive Load VCE = VCES, VCIN = 15V (Fig. 5) Tj = 25C Tj = 125C (Fig. 2) Min. -- -- -- 0.5 -- -- -- -- -- -- Limits Typ. 1.8 1.9 2.5 1.0 0.5 0.4 2.0 0.7 -- -- Max. 2.3 2.4 3.5 2.5 0.8 1.0 3.0 1.2 1 10 Unit V V
N
P
Switching Time
(Fig. 3,4) Tj = 25C Tj = 125C
Collector-Emitter Cutoff Current
B
U
V
W
s
mA
Oct. 2003
MITSUBISHI
PM50RLA120
FLAT-BASE TYPE INSULATED PACKAGE
BRAKE PART
Symbol VCE(sat) VFM ICES Parameter Collector-Emitter Saturation Voltage FWDi Forward Voltage Collector-Emitter Cutoff Current VD = 15V, IC = 25A VCIN = 0V, Pulsed IF = 25A VCE = VCES, VCIN = 15V Condition Tj = 25C Tj = 125C (Fig. 2) Tj = 25C Tj = 125C Min. -- -- -- -- -- Limits Typ. 1.8 1.9 2.5 -- -- Max. 2.3 2.4 3.5 1 10 Unit V V mA
(Fig. 1)
(Fig. 5)
CONTROL PART
Symbol ID Vth(ON) Vth(OFF) SC toff(SC) OT OTr UV UVr IFO(H) IFO(L) tFO Parameter Circuit Current Input ON Threshold Voltage Input OFF Threshold Voltage Short Circuit Trip Level Short Circuit Current Delay Time Over Temperature Protection Supply Circuit Under-Voltage Protection Fault Output Current Minimum Fault Output Pulse Width VD = 15V, VCIN = 15V Condition VN1-VNC VXP1-VXPC Min. -- -- 1.2 1.7 100 50 -- 135 -- 11.5 -- -- -- 1.0 Limits Typ. 20 5 1.5 2.0 -- -- 0.2 145 125 12.0 12.5 -- 10 1.8 Max. 30 10 1.8 2.3 -- -- -- 155 -- 12.5 -- 0.01 15 -- Unit mA V A s C V mA ms
Applied between : UP-VUPC, VP-VVPC, WP-VWPC UN * VN * WN * Br-VNC Inverter part -20 Tj 125C, VD = 15V (Fig. 3,6) Brake part VD = 15V Detect Tj of IGBT chip -20 Tj 125C VD = 15V, VCIN = 15V VD = 15V (Fig. 3,6) Trip level Reset level Trip level Reset level (Note-3) (Note-3)
(Note-3) Fault output is given only when the internal SC, OT & UV protections schemes of either upper or lower arm device operate to protect it.
MECHANICAL RATINGS AND CHARACTERISTICS
Symbol -- -- -- Parameter Mounting torque Mounting torque Weight Main terminal Mounting part -- Condition screw : M5 screw : M5 Min. 2.5 2.5 -- Limits Typ. 3.0 3.0 380 Max. 3.5 3.5 -- Unit N*m N*m g
RECOMMENDED CONDITIONS FOR USE
Symbol VCC VD VCIN(ON) VCIN(OFF) fPWM tdead Parameter Supply Voltage Control Supply Voltage Input ON Voltage Input OFF Voltage PWM Input Frequency Arm Shoot-through Blocking Time Condition Applied across P-N terminals Applied between : VUP1-VUPC, VVP1-VVPC VWP1-VWPC, VN1-VNC (Note-4) Applied between : UP-VUPC, VP-VVPC, WP-VWPC UN * VN * WN * Br-VNC Using Application Circuit of Fig. 8 For IPM's each input signals (Fig. 7) Recommended value 800 15.0 1.5 0.8 9.0 20 2.5 Unit V V V kHz s
(Note-4) With ripple satisfying the following conditions dv/dt swing 5V/s, Variation 2V peak to peak
Oct. 2003
MITSUBISHI
PM50RLA120
FLAT-BASE TYPE INSULATED PACKAGE
PRECAUTIONS FOR TESTING 1. Before appling any control supply voltage (VD), the input terminals should be pulled up by resistores, etc. to their corresponding supply voltage and each input signal should be kept off state. After this, the specified ON and OFF level setting for each input signal should be done. 2. When performing "SC" tests, the turn-off surge voltage spike at the corresponding protection operation should not be allowed to rise above VCES rating of the device. (These test should not be done by using a curve tracer or its equivalent.)
P, (U,V,W,B)
IN Fo IN Fo
P, (U,V,W)
VCIN
(0V)
V
Ic
VCIN
(15V)
V
-Ic
VD (all)
U,V,W, (N)
VD (all)
U,V,W,B, (N)
Fig. 1 VCE(sat) Test
Fig. 2 VEC, (VFM) Test
a) Lower Arm Switching
P
VCIN (15V) VCIN
Signal input (Upper Arm) Signal input (Lower Arm)
Fo
Fo
U,V,W
trr Irr
CS
VCE Ic 90%
Vcc 90%
N
b) Upper Arm Switching
VCIN Signal input (Upper Arm) Signal input (Lower Arm)
VD (all)
P
Ic
10%
10% tc (on)
10% tc (off)
10%
Fo
U,V,W
VCIN
CS
Vcc
td (on)
tr
td (off)
tf
VCIN (15V)
Fo
(ton= td (on) + tr)
N
(toff= td (off) + tf)
VD (all)
Ic
Fig. 3 Switching time and SC test circuit
Fig. 4 Switching time test waveform
VCIN Short Circuit Current
P, (U,V,W,B) A
IN Fo
Constant Current SC
Pulse VCE
VCIN (15V)
Ic
VD (all)
U,V,W, (N)
Fo toff(SC)
Fig. 5 ICES Test
Fig. 6 SC test waveform
IPM' input signal VCIN (Upper Arm)
0V
IPM' input signal VCIN (Lower Arm)
1.5V
2V
1.5V
t
0V
2V
1.5V
2V
t
tdead
tdead
tdead
1.5V: Input on threshold voltage Vth(on) typical value, 2V: Input off threshold voltage Vth(off) typical value
Fig. 7 Dead time measurement point example
Oct. 2003
MITSUBISHI
PM50RLA120
FLAT-BASE TYPE INSULATED PACKAGE
P
20k 10
VUP1 Fo UP VUPC Rfo
Vcc Fo In
OT OUT Si U
VD
IF
+ -
GND GND Vcc Fo In GND GND Vcc Fo OT OUT Si W OT OUT Si OT OUT Si V
0.1
VVP1 Fo Rfo
VD
VP VVPC VWP1 Fo Rfo
M
VD
20k
WP VWPC
In GND GND Vcc Fo
IF
10
UN
0.1
In GND GND N OT
20k
IF
10
Vcc VN Fo In
OUT Si
0.1 20k
GND GND VN1
10
Vcc Fo In
OT OUT Si B
VD
IF
WN
0.1
VNC
GND GND Vcc OT OUT Si
IF
4.7k
Br
1k
Fo In Rfo
5V
GND GND
Fo
: Interface which is the same as the U-phase
Fig. 8 Application Example Circuit
NOTES FOR STABLE AND SAFE OPERATION ; Design the PCB pattern to minimize wiring length between opto-coupler and IPM's input terminal, and also to minimize the stray capacity between the input and output wirings of opto-coupler. Connect low impedance capacitor between the Vcc and GND terminal of each fast switching opto-coupler. Fast switching opto-couplers: tPLH, tPHL 0.8s, Use High CMR type. Slow switching opto-coupler: CTR > 100% Use 4 isolated control power supplies (VD). Also, care should be taken to minimize the instantaneous voltage charge of the power supply. Make inductance of DC bus line as small as possible, and minimize surge voltage using snubber capacitor between P and N terminal. Use line noise filter capacitor (ex. 4.7nF) between each input AC line and ground to reject common-mode noise from AC line and improve noise immunity of the system.
* * * * * * *
Oct. 2003

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